Introduction to RISC-V architecture Training Course
This course provides an introduction to the RISC-V architecture and its associated microcontrollers. Participants may optionally engage in practical exercises using the GD32VF103 microcontroller, involving programming in C or assembly language, as well as using the RARS simulator.
This course is available as onsite live training in Kenya or online live training.Course Outline
The origins of RISC-V architecture, including the modular architecture definition comprising base architectures and extensions. Coverage of the RISC-V ISA, such as registers and the instruction set, along with features aligned with modern software concepts. An overview of RISC-V implementations is also provided.
RISC-V system architecture, focusing on exceptions and their management. Discussions on the CLIC interrupt controller and the ECLIC interrupt controller within the GD32VF103.
Practical Exercises:
1. Firmware development for the GD32VF103 using VSCode.
2. Implementing interrupts on the GD32VF103.
Requirements
Foundational knowledge of the C programming language.
Need help picking the right course?
southafrica@nobleprog.co.za or +27 (0)10 005 5793
Introduction to RISC-V architecture Training Course - Enquiry
Testimonials (1)
Being able to ask for advanced subjects even if there were not planned initially.
Gabriel Chouinard - Spark Microsystems
Course - FreeRTOS: Programming for Real Time Operating Systems
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